The present invention relates generally to integrated circuit (IC) designs, and more particularly to an apparatus for testing a large number of dice on a semiconductor wafer without repositioning test probes.
A semiconductor wafer typically contains a large number of dice constructed on a round-shaped semiconductor substrate. Each die embodies a complex integrated circuit formed by semiconductor processing technology, such as chemical vapor deposition, thermal oxidation, ion implantation, lithography, etching, and metallization, to carry out certain functionalities. These dice need to be tested to determine whether they meet predefined specifications, before they can be separated from the wafer for individual package. Conventionally, each die may include one or more pads that can be used to form electrical contacts with test probes of an external test machine. The test machine sends out test signals and receives resultant signals to and from the die under test (DUT) via the test probes and the pads. The resultant signal contains information with respect to the DUT, and can be further analyzed by the test machine to determine whether the DUT meet those predefined specifications.
One drawback of the conventional die testing scheme is that it is very time consuming. Every time when the test machine tests a new die, the test probes need to be repositioned from a previous DUT to form electrical contacts with the pads of the new die. Every repositioning of probes may take seconds, and a semiconductor wafer usually contains tens to tens of thousands of dice. As a result, a complete test for a semiconductor wafer usually requires a long time, which often represents a significant portion of the manufacturing cost for each die. As the semiconductor processing technology advances, the number of dice on a semiconductor wafer increases significantly, and therefore the manufacturing cost of die also increases dramatically due to the prolonged die testing procedure.
For example, conventional probe testing can only be performed on a few unsorted dice, typically less than 20 DUTs, for each time that the probes are positioned. In order to perform tests on a larger number of DUTs, the probes need to be repositioned. Supposing that 80,000 DUTs on a semiconductor wafer need to be tested, a really long period of time will be needed just for repositioning the probes. In the time-conscious of semiconductor industry, the cost incurred by the testing time is often unacceptable.
As such, desirable in the art of IC designs is an apparatus for testing a large number of dice on a semiconductor wafer without repositioning test probes.